1. Technical Field
The present invention relates to a probe wafer, a probe device, and a testing system.
2. Related Art
A known semiconductor chip test apparatus tests individually a plurality of semiconductor chips in a state of being formed on a semiconductor wafer (for example, see Patent Document 1). Such an apparatus may be formed with a probe card that can establish electrical connection with all of the semiconductor chips at the same time.    Patent Document 1: Japanese Patent Application Publication No. 2002-222839    Patent Document 2: International Publication No. 2003/062837
The probe card is generally formed by using a printed circuit board or the like (for example, see Patent Document 2). A plurality of probe pins are formed on the printed circuit board so that the resulting probe card can be electrically connected to all the semiconductor chips at the same time.
It should be noted that, however, the semiconductor wafer differs in coefficient of thermal expansion from the printed circuit board. Therefore, the electrical connection between the semiconductor chips and the probe card may be disconnected due to any temperature variation that may be caused by the heat generated by the semiconductor chips during tests, heating or cooling tests, and the like. This problem becomes significant for tests of semiconductor chips formed on a large-area semiconductor wafer.
A semiconductor chip test may be conducted by using, for example, a BOST circuit. In this case, a BOST circuit may be mounted on a probe card. When a semiconductor chip test is performed on a semiconductor wafer having a plurality of semiconductor chips formed thereon, however, a large number of BOST circuits need to be mounted on the probe card. It is difficult to mount all of the BOST circuits onto the printed circuit board of the probe card.
Alternatively, a semiconductor chip test may be performed by using a BIST circuit formed within a semiconductor chip. In this case, however, a semiconductor chip is required to include therein a circuit that is not to be used for its actual operation, which reduces the region in which a circuit for the actual operation of the semiconductor chip is to be formed.
A semiconductor chip test requires a very large scale test apparatus including a control main frame, a test head having therein a plurality of test modules and the like, a probe card that is to be brought into a contact with semiconductor chips, and the like. Thus, there is a demand for a smaller semiconductor chip test apparatus.
In light of the above, an advantage of some aspects of the present invention is to provide a probe wafer, a probe device, and a testing system that can solve the above-mentioned problems. This advantage is achieved by combining the features recited in the independent claims. The dependent claims define further effective specific example of the present invention.